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82801FB Datasheet, PDF (508/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family | |||
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UHCI Controllers Registers
13.1.1
13.1.2
13.1.3
VIDâVendor Identification Register
(USBâD29:F0/F1/F2/F3)
Address Offset:
Default Value:
00â01h
8086h
Attribute:
Size:
RO
16 bits
Bit
Description
15:0 Vendor ID â RO. This is a 16-bit value assigned to Intel
DIDâDevice Identification Register
(USBâD29:F0/F1/F2/F3)
Address Offset:
Default Value:
02â03h
UHCI #1 = 2658h
UHCI #2 = 2659h
UHCI #3 = 265Ah
UHCI #4 = 265Bh
Attribute:
Size:
RO
16 bits
Bit
Description
15:0 Device ID â RO. This is a 16-bit value assigned to the ICH6 USB host controllers
PCICMDâPCI Command Register (USBâD29:F0/F1/F2/F3)
Address Offset:
Default Value:
04â05h
0000h
Attribute:
Size:
R/W, RO
16 bits
Bit
Description
15:11
10
Reserved
Interrupt Disable â R/W.
0 = Enable. The function is able to generate its interrupt to the interrupt controller.
1 = Disable. The function is not capable of generating interrupts.
NOTE: The corresponding Interrupt Status bit is not affected by the interrupt enable.
9 Fast Back to Back Enable (FBE) â RO. Hardwired to 0.
8 SERR# Enable â RO. Reserved as 0.
7 Wait Cycle Control (WCC) â RO. Hardwired to 0.
6 Parity Error Response (PER) â RO. Hardwired to 0.
5 VGA Palette Snoop (VPS) â RO. Hardwired to 0.
4 Postable Memory Write Enable (PMWE) â RO. Hardwired to 0.
3 Special Cycle Enable (SCE) â RO. Hardwired to 0.
Bus Master Enable (BME) â R/W.
2 0 = Disable
1 = Enable. ICH6 can act as a master on the PCI bus for USB transfers.
1 Memory Space Enable (MSE) â RO. Hardwired to 0.
I/O Space Enable (IOSE) â R/W. This bit controls access to the I/O space registers.
0 0 = Disable
1 = Enable accesses to the USB I/O registers. The Base Address register for USB should be
programmed before this bit is set.
508
Intel® I/O Controller Hub 6 (ICH6) Family Datasheet
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