82801FB Datasheet, PDF (408/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

LPC Interface Bridge Registers (D31:F0)
10.8.3.4
PM1_TMR—Power Management 1 Timer Register
I/O Address:
Default Value:
Lockable:
Power Well:
PMBASE + 08h
(ACPI PMTMR_BLK)
xx000000h
No
Core
Attribute:
Size:
Usage:
RO
32-bit
ACPI
10.8.3.5
Bit
Description
31:24
23:0
Reserved
Timer Value (TMR_VAL) — RO. Returns the running count of the PM timer. This counter runs off a
3.579545 MHz clock (14.31818 MHz divided by 4). It is reset to 0 during a PCI reset, and then
continues counting as long as the system is in the S0 state. After an S1 state, the counter will not be
reset (it will continue counting from the last value in S0 state.
Anytime bit 22 of the timer goes HIGH to LOW (bits referenced from 0 to 23), the TMROF_STS bit
(PMBASE + 00h, bit 0) is set. The High-to-Low transition will occur every 2.3435 seconds. If the
TMROF_EN bit (PMBASE + 02h, bit 0) is set, an SCI interrupt is also generated.
PROC_CNT—Processor Control Register
I/O Address:
Default Value:
Lockable:
Power Well:
PMBASE + 10h
(ACPI P_BLK)
00000000h
No (bits 7:5 are write once)
Core
Attribute:
Size:
Usage:
R/W, RO, WO
32-bit
ACPI or Legacy
Bit
Description
31:18 Reserved
Throttle Status (THTL_STS) — RO.
17 ^{0 = No clock throttling is occurring (maximum processor performance).}
1 = Indicates that the clock state machine is throttling the processor performance. This could be
due to the THT_EN bit or the FORCE_THTL bit being set.
16:9 Reserved
Force Thermal Throttling (FORCE_THTL) — R/W. Software can set this bit to force the thermal
throttling function.
8 _{0 = No forced throttling.}
1 = Throttling at the duty cycle specified in THRM_DTY starts immediately, and no SMI# is
generated.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet