82801FB Datasheet, PDF (86/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Pin States
Table 3-4. Power Plane and States for Output and I/O Signals for Mobile Configurations
(Sheet 2 of 4)
Signal Name
Power
Plane
During
Immediately
PLTRST#⁶ / after PLTRST#⁶ /
RSMRST#⁷
RSMRST#⁷
C3/C4
S1
S3_COLD13 S4/S5
LAN Connect and EEPROM Interface
EE_CS
EE_DOUT
EE_SHCLK
LAN_RSTSYNC
LAN_TXD[2:0]
VccLAN3_3
VccLAN3_3
VccLAN3_3
VccLAN3_3
VccLAN3_3
DA[2:0]
DCS1#, DCS3#
DD[15:8], DD[6:0]
DD[7]
DDACK#
DIOR#, DIOW#
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Low
High
Low
High
Low
Undefined
High
High-Z
Low
High
High
Running
High
Running
Low
Low
IDE Interface
Undefined
High
High-Z
Low
High
High
Defined
Defined
Defined
Defined
Defined
Defined
Defined
Defined
Defined
Defined
Note 4
Note 4
Note 4
Note 4
Note 4
Note 4
Note 4
Note 4
Note 4
Note 4
Undefined Undefined
Off
Off
High
High
Off
Off
Defined High-Z
Off
Off
Defined
Low
Off
Off
High
High
Off
Off
High
High
Off
Off
SATA Interface
SATA[0]TXP,
SATA[0]TXN
SATA[2]TXP,
SATA[2]TXN
SATALED#
SATARBIAS
Vcc3_3
Vcc3_3
Vcc3_3
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Defined Defined
Off
Off
Defined Defined
Off
Off
Defined Defined
Off
Off
Interrupts
PIRQ[A:H]#
SERIRQ
Vcc3_3
Vcc3_3
High-Z
High-Z
High-Z
Defined High-Z
Off
Off
High-Z
Running High-Z
Off
Off
USB Interface
USBP[7:0][P,N]
USBRBIAS
VccSus3_3
VccSus3_3
PLTRST#
SLP_S3#
SLP_S4#
SLP_S5#
STP_PCI#
STP_CPU#
SUS_STAT#
DPRSLPVR
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
Vcc3_3
Vcc3_3
VccSus3_3
Vcc3_3
Low
High-Z
Low
High-Z
Low
Defined
Power Management
Low
Low
Low
Low
High
High
Low
Low
High
High
High
High
High
High
High
Low
High
High
High
High
Defined
Low
High
Low/High⁵
Low
Defined
High
High
High
High
High
High
High
High
Low
Low
Defined Defined
Low
Low
High
High
Low
Low
Low
Off
Low
Low
Low
Low¹⁰
Low
Low
Low
Off
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet