82801FB Datasheet, PDF (750/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Electrical Characteristics
Table 22-14. Ultra ATA Timing (Mode 3, Mode 4, Mode 5) (Sheet 2 of 2)
Sym
Parameter1
Mode 3
(ns)
Min Max
Mode 4
(ns)
Min Max
Mode 5
(ns)
Min Max
Measuring
Location
Figure
STROBE output released-to-
t93 driving to the first transition of
critical timing (Tzfs)
0
–
0
–
35
–
Device
Connector
22-12
t94
Data Output Released-to-
Driving Until the First Transition 20.0 –
of Critical Timing (Tdzfs)
6.7
–
25
–
Sender
Connector
t95 Unlimited Interlock Time (Tui)
0
–
0
–
0
–
Host
Connector
Maximum time allowed for
t96a output drivers to release (from
asserted or negated) (Taz)
– 10 – 10 – 10
Note 2
t96b
Drivers to assert or negate (from
released) (Tzad)
0
–
0
–
0
–
Device
Connector
Ready-to-final-STROBE time
t97
(no STROBE edges shall be
sent this long after negation of
DMARDY#) (Trfs)
–
60
–
60
–
50
Sender
Connector
t98a
Maximum time before releasing
IORDY (Tiordyz)
–
20
–
20
–
20
Device
Connector
t98b
Minimum time before driving
IORDY (see Note 2) (Tziordy)
0
–
0
–
0
–
Device
Connector
Time from STROBE edge to
t99
negation of DMARQ or assertion
of STOP (when sender
50
–
50
–
50
–
Sender
Connector
22-11
terminates a burst) (Tss)
NOTES:
1. The specification symbols in parentheses correspond to the AT Attachment – 6 with Packet Interface (ATA/
ATAPI – 6) specification name.
2. See the AT Attachment – 6 with Packet Interface (ATA/ATAPI – 6) specification for further details on
measuring these timing parameters.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet