82801FB Datasheet, PDF (352/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

LPC Interface Bridge Registers (D31:F0)
10.1.17
SIRQ_CNTL—Serial IRQ Control Register
(LPC I/F—D31:F0)
Offset Address: 64h
Default Value: 10h
Lockable:
No
Attribute:
Size:
Power Well:
R/W, RO
8 bit
Core
Bit
Description
Serial IRQ Enable (SIRQEN) — R/W.
7 _{0 = The buffer is input only and internally SERIRQ will be a 1.}
1 = Serial IRQs will be recognized. The SERIRQ pin will be configured as SERIRQ.
Serial IRQ Mode Select (SIRQMD) — R/W.
0 = The serial IRQ machine will be in quiet mode.
1 = The serial IRQ machine will be in continuous mode.
6
NOTE: For systems using Quiet Mode, this bit should be set to 1 (Continuous Mode) for at least one
frame after coming out of reset before switching back to Quiet Mode. Failure to do so will
result in the ICH6 not recognizing SERIRQ interrupts.
5:2
Serial IRQ Frame Size (SIRQSZ) — RO. This field is fixed to indicate the size of the SERIRQ frame
as 21 frames.
Start Frame Pulse Width (SFPW) — R/W. This is the number of PCI clocks that the SERIRQ pin will
be driven low by the serial IRQ machine to signal a start frame. In continuous mode, the ICH6 will
drive the start frame for the number of clocks specified. In quiet mode, the ICH6 will drive the start
frame for the number of clocks specified minus one, as the first clock was driven by the peripheral.
1:0 _{00 = 4 clocks}
01 = 6 clocks
10 = 8 clocks
11 = Reserved
352
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet