82801FB Datasheet, PDF (31/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Contents
19.1.6 PI—Programming Interface Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................681
19.1.7 SCC—Sub Class Code Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................681
19.1.8 BCC—Base Class Code Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................681
19.1.9 CLS—Cache Line Size Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................682
19.1.10 PLT—Primary Latency Timer Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................682
19.1.11 HEADTYP—Header Type Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................682
19.1.12 BNUM—Bus Number Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................682
19.1.13 IOBL—I/O Base and Limit Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................683
19.1.14 SSTS—Secondary Status Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................684
19.1.15 MBL—Memory Base and Limit Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................685
19.1.16 PMBL—Prefetchable Memory Base and Limit Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................685
19.1.17 PMBU32—Prefetchable Memory Base Upper 32 Bits
Register (PCI Express—D28:F0/F1/F2/F3) .........................................................686
19.1.18 PMLU32—Prefetchable Memory Limit Upper 32 Bits
Register (PCI Express—D28:F0/F1/F2/F3) .........................................................686
19.1.19 CAPP—Capabilities List Pointer Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................686
19.1.20 INTR—Interrupt Information Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................686
19.1.21 BCTRL—Bridge Control Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................687
19.1.22 CLIST—Capabilities List Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................688
19.1.23 XCAP—PCI Express* Capabilities Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................688
19.1.24 DCAP—Device Capabilities Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................689
19.1.25 DCTL—Device Control Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................690
19.1.26 DSTS—Device Status Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................691
19.1.27 LCAP—Link Capabilities Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................692
19.1.28 LCTL—Link Control Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................693
19.1.29 LSTS—Link Status Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................694
19.1.30 SLCAP—Slot Capabilities Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................695
19.1.31 SLCTL—Slot Control Register
(PCI Express—D28:F0/F1/F2/F3)........................................................................696
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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