82801FB Datasheet, PDF (430/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

LPC Interface Bridge Registers (D31:F0)
10.10 General Purpose I/O Registers (D31:F0)
The control for the general purpose I/O signals is handled through a separate 64-byte I/O space.
The base offset for this space is selected by the GPIOBASE register.
10.10.1 GPIO Register I/O Address Map
Table 10-13. Registers to Control GPIO Address Map
GPIOBASE
+ Offset
Mnemonic
Register Name
00–03h
04–07h
08–0Bh
General Registers
GPIO_USE_SEL GPIO Use Select
GP_IO_SEL
—
GPIO Input/Output Select
Reserved
0C–0Fh
GP_LVL
GPIO Level for Input or Output
10–13h
14–17h
18–1Bh
1C–1Fh
20–2Bh
2C–2Fh
30–33h
34–37h
38–3Bh
—
Reserved
Output Control Registers
—
GPO_BLINK
—
Reserved
GPIO Blink Enable
Reserved
Input Control Registers
—
Reserved
GPI_INV
GPIO Signal Invert
GPIO_USE_SEL2 GPIO Use Select 2 [63:32]
GP_IO_SEL2 GPIO Input/Output Select 2 [63:32]
GP_LVL2
GPIO Level for Input or Output 2 [63:32]
Default
Access
1BA83180h
R/W
E400 FFFFh R/W
—
—
R/W
FF3F0000h
—
—
—
—
00040000h
R/W
—
—
—
—
00000000h
R/W
00000006h
R/W
00000300h
R/W
00030207h
R/W
430
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet