82801FB Datasheet, PDF (472/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

SATA Controller Registers (D31:F2)
12.1.28
PMCS—PCI Power Management Control and Status
Register (SATA–D31:F2)
Address Offset: 74–75h
Default Value: 0000h
Attribute:
Size:
RO, R/W, R/WC
16 bits
Bits
Description
15
PME Status (PMES) — R/WC. Bit is set when a PME event is to be requested, and if this bit and
PMEE is set, a PME# will be generated from the SATA controller
14:9 Reserved
8
PME Enable (PMEE) — R/W. When set, the SATA controller generates PME# form D3_HOT on a
wake event.
7:2 Reserved
Power State (PS) — R/W. These bits are used both to determine the current power state of the
SATA controller and to set a new power state.
00 = D0 state
1:0
11 = D3_HOT state
When in the D3_HOT state, the controller’s configuration space is available, but the I/O and memory
spaces are not. Additionally, interrupts are blocked.
12.1.29
MAP—Address Map Register (SATA–D31:F2)
Address Offset: 90h
Default Value: 00h
Attribute:
Size:
R/W
8 bits
Bits
Description
Use SATA Class Code (USCC) — R/W.
ICH6 / ICH6R Only:
7
Reserved. Software must not set this bit.
ICH6-M Only:
0 =Subclass code reported in SCC (D31:F2:Offset 0Ah) is 01h (IDE Controller).
1 =Subclass code reported in SCC is 06h (SATA controller).
6:2 Reserved.
Map Value — R/W. Map Value (MV): The value in the bits below indicate the address range the
SATA ports responds to, and whether or not the PATA and SATA functions are combined. When in
combined mode, the AHCI memory space is not available and AHCI may not be used.
00 = Non-combined. P0 is primary master, P2 is the primary slave. P1 is secondary master, P3 is the
1:0
secondary slave (desktop only). P0 is primary master, P2 is the primary slave (mobile only).
01 = Combined. IDE is primary. P1 is secondary master, P3 is the secondary slave. (desktop only)
10 = Combined. P0 is primary master. P2 is primary slave. IDE is secondary
11 = Reserved
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet