82801FB Datasheet, PDF (698/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

PCI Express* Configuration Registers
19.1.33
RCTL—Root Control Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 5C–5Dh
Default Value: 0000h
Attribute:
Size:
R/W
16 bits
Bit
Description
15:4 Reserved
PME Interrupt Enable (PIE) — R/W.
0 = Interrupt generation disabled.
3 _{1 = Interrupt generation enabled when PCISTS.Inerrupt Status (D28:F0/F1/F2/F3:60h, bit-16) is in}
a set state (either due to a 0 to 1 transition, or due to this bit being set with RSTS.IS already
set).
System Error on Fatal Error Enable (SFE) — R/W.
0 = An SERR# will not be generated.
2 _{1 = An SERR# will be generated, assuming CMD.SEE (D28:F0/F1/F2/F3:04, bit 8) is set, if a fatal}
error is reported by any of the devices in the hierarchy of this root port, including fatal errors in
this root port.
System Error on Non-Fatal Error Enable (SNE) — R/W.
0 = An SERR# will not be generated.
1 _{1 = An SERR# will be generated, assuming CMD.SEE (D28:F0/F1/F2/F3:04, bit 8) is set, if a non-}
fatal error is reported by any of the devices in the hierarchy of this root port, including non-fatal
errors in this root port.
System Error on Correctable Error Enable (SCE) — R/W.
0 = An SERR# will not be generated.
0 _{1 = An SERR# will be generated, assuming CMD.SEE (D28:F0/F1/F2/F3:04, bit 8) if a correctable}
error is reported by any of the devices in the hierarchy of this root port, including correctable
errors in this root port.
19.1.34
RSTS—Root Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset: 60–63h
Default Value: 00000000h
Attribute:
Size:
R/WC, RO
32 bits
Bit
Description
31:18 Reserved
PME Pending (PP) — RO.
17 ^{0 = When the original PME is cleared by software, it will be set again, the requestor ID will be}
updated, and this bit will be cleared.
1 = Indicates another PME is pending when the PME status bit is set.
PME Status (PS) — R/WC.
16 ^{0 = PME was not asserted.}
1 = Indicates that PME was asserted by the requestor ID in RID. Subsequent PMEs are kept
pending until this bit is cleared.
15:0
PME Requestor ID (RID) — RO. Indicates the PCI requestor ID of the last PME requestor. Valid
only when PS is set.
698
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet