82801FB Datasheet, PDF (745/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Electrical Characteristics
Table 22-10. PCI Interface Timing
Sym
Parameter
Min Max Units Figure
t40 AD[31:0] Valid Delay
2
11 ns 22-2
t41 AD[31:0] Setup Time to PCICLK Rising
7
–
ns
22-3
t42 AD[31:0] Hold Time from PCICLK Rising
0
–
ns
22-3
C/BE[3:0]#, FRAME#, TRDY#, IRDY#, STOP#, PAR,
t43 PERR#, PLOCK#, DEVSEL# Valid Delay from PCICLK 2
Rising
11 ns 22-2
C/BE[3:0]#, FRAME#, TRDY#, IRDY#, STOP#, PAR,
t44 PERR#, PLOCK#, IDSEL, DEVSEL# Output Enable
Delay from PCICLK Rising
2
–
ns
22-6
C/BE[3:0]#, FRAME#, TRDY#, IRDY#, STOP#, PERR#,
t45 PLOCK#, DEVSEL#, GNT[A:B]# Float Delay from
2
PCICLK Rising
28 ns 22-4
t46
C/BE[3:0]#, FRAME#, TRDY#, IRDY#, STOP#, SERR#,
PERR#, DEVSEL#, Setup Time to PCICLK Rising
7
–
ns
22-3
C/BE[3:0]#, FRAME#, TRDY#, IRDY#, STOP#, SERR#,
t47 PERR#, DEVSEL#, REQ[A:B]# Hold Time from PCLKIN 0
Rising
–
ns
22-3
t48 PCIRST# Low Pulse Width
1
– ms 22-5
t49 GNT[6:0]# Valid Delay from PCICLK Rising
2
12 ns
t50 REQ[6:0]# Setup Time to PCICLK Rising
12
–
ns
Notes
1
1
NOTES:
1. Refer to note 3 of table 4-4 in Section 4.2.2.2 and note 2 of table 4-6 in Section 4.2.3.2 of the PCI Local Bus
Specification, Revision 2.3 for measurement details.
Table 22-11. IDE PIO Mode Timings
Sym
Parameter
Mode 0
(nS)
Mode 1
(nS)
Mode 2
(nS)
Mode 3
(nS)
Mode 4
(nS)
Figure
t60 Cycle Time (min)
600
383
240
180
120 22-7
t61 Addr setup to DIOW#/DIOR# (min)
t62 DIRW#/DIOR# (min)
70
50
30
30
165
125
100
80
25
22-7
70
22-7
t62i DIOW#/DIOR# recovery time (min)
–
–
–
70
25
22-7
t63 DIOW# data setup (min)
t64 DIOW# data hold (min)
60
45
30
30
20
22-7
30
20
15
10
10
22-7
t65 DIOR# data setup (min)
t66 DIOR# data hold (min)
50
35
20
20
20
22-7
5
5
5
5
5
22-7
t66z DIOR# data tri-state (max)
30
30
30
30
30
22-7
t69 DIOW#/DIOR# to address valid hold (min) 20
15
10
10
10
22-7
t60rd Read data Valid to IORDY active (min)
0
0
0
0
0
22-7
t60a IORDY Setup
t60b IORDY Pulse Width (max)
35
1250
35
1250
35
1250
35
1250
35
1250
22-7
22-7
t60c IORDY assertion to release (max)
5
5
5
5
5
22-7
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
745