82801FB Datasheet, PDF (782/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Testability
Table 24-3. XOR Chain #2 (REQ[4:1]# = 0001)
Pin Name
AD[29]
IRDY#
AD[14]
AD[7]
PLOCK#
AD[12]
AD[8]
DEVSEL#
PERR#
PCICLK
C/BE[2]#
Ball #
A5
A3
B4
D6
C5
D5
E6
C3
E3
G6
G4
Notes
Top of XOR Chain
2nd signal in XOR
AD[23]
H5
AD[21]
H4
C/BE[3]#
G2
AD[27]
K6
AD[17]
K5
AD[31]
K4
AD[19]
L6
AD[25]
M6
LAD[0]/FWH[0] P2
LAD[1]/FWH[1] N3
LAD[2]/FWH[2] N5
LAD[3]/FWH[3] N4
LDRQ[0]#
N6
LFRAME#/
FWH[4]
P3
LDRQ[1]#/GPI[41] P4
Pin Name
Ball #
GPI[8]
RI#
PWRBTN#
TP[3]
BATLOW#/TP[0]
SATARBIAS#
SATARBIAS
SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP
SATA[1]RXN/
RESERVED
SATA[1]RXP/
RESERVED
SATA[1]TXN/
RESERVED
SATA[1]TXP/
RESERVED
BMBUSY#/
GPI[6]
SATA[1]GP/
GPI[29]
GPI[7]
SATA[0]GP/
GPI[26]
CLKRUN#/
GPIO[32]
GPIO[33]
GPIO[34]
GPO[21]
THRM#
R1
T2
U1
U3
V2
AG11
AF11
AE3
AD3
AG2
AF2
AC5
AD5
AF4
AG4
AD19
AE18
AE19
AF17
AF19
AF20
AC18
AD20
AC20
Notes
27th signal in XOR
MCH_SYNC# AG21
REQ[6]#/GPI[0] B7
XOR Chain #2
OUTPUT
782
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet