82801FB Datasheet, PDF (76/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Signal Description
2.22.2 External RTC Circuitry
To reduce RTC well power consumption, the ICH6 implements an internal oscillator circuit that is
sensitive to step voltage changes in VccRTC. Figure 2-3 shows an example schematic
recommended to ensure correct operation of the ICH6 RTC.
Figure 2-3. Example External RTC Circuit
VccSus3_3
1 KΩ
Vbatt
+
–
Schottky
Diodes
20 KΩ
1.0 µF
(20% tolerance)
1 µF
(20% tolerance)
32.768 kHz
Xtal
C1
15 pF
(5% tolerance)
C2
15 pF
(5% tolerance)
VCCRTC
R1
10 MΩ
RTCX2
RTCX1
NOTE: C1 and C2 depend on crystal load.
RTCRST#
2.22.3 Power Sequencing Requirements
2.22.3.1
2.22.3.2
V5REF / Vcc3_3 Sequencing Requirements
V5REF is the reference voltage for 5 V tolerance on inputs to the ICH6. V5REF must be powered
up before Vcc3_3, or after Vcc3_3 within 0.7 V. Also, V5REF must power down after Vcc3_3, or
before Vcc3_3 within 0.7 V. The rule must be followed in order to ensure the safety of the ICH6. If
the rule is violated, internal diodes will attempt to draw power sufficient to damage the diodes from
the Vcc3_3 rail.
This rule also applies to V5REF_Sus and VccSus3_3. However, in most platforms, the VccSus3_3
rail is derived from the 5 VSB on the power supply through a voltage regulator and therefore, the
VccSus3_3 rail will always come up after the VccSus5 rail. As a result, V5REF_Sus (which is
derived directly from VccSus5) will always be powered up before VccSus3_3 and thus circuitry to
satisfy the sequence requirement is not needed. However, in platforms that do not derive the
VccSus3_3 rail from the VccSus5 rail, this rule must be observed in the platform design as
described above.
3.3 V/1.5 V Standby Power Sequencing Requirements
For platforms that use the integrated 1.5 V standby regulator, there are no power sequencing
requirements for associated 3.3 V/1.5 V (standby or core) rails of the ICH6.
For platforms that use an external 1.5 V standby regulator to power VccSus1_5 of the ICH6 (the
internal voltage regulator is disabled), the platform must ensure that VccSus3_3 ramps up before
VccSus1_5 or after VccSus1_5 within 0.7 V. VccSus1_5 must power down before VccSus3_3 or
after VccSus3_3 within 0.7 V.
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Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet