82801FB Datasheet, PDF (527/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

EHCI Controller Registers (D29:F7)
14 EHCI Controller Registers
(D29:F7)
14.1 USB EHCI Configuration Registers
(USB EHCI—D29:F7)
Note: Register address locations that are not shown in Table 14-1 should be treated as Reserved
(see Section 6.2 for details).
Note: All configuration registers in this section are in the core well and reset by a core well reset and the
D3-to-D0 warm reset, except as noted.
Table 14-1. USB EHCI PCI Register Address Map (USB EHCI—D29:F7) (Sheet 1 of 2)
Offset
00–01h
02–03h
04–05h
06–07h
Mnemonic
VID
DID
PCICMD
PCISTS
Register Name
Vendor Identification
Device Identification
PCI Command
PCI Status
08h
RID
Revision Identification
09h
0Ah
0Bh
0Dh
10–13h
2C–2Dh
2E–2Fh
34h
3Ch
PI
SCC
BCC
PMLT
MEM_BASE
SVID
SID
CAP_PTR
INT_LN
Programming Interface
Sub Class Code
Base Class Code
Primary Master Latency Timer
Memory Base Address
USB EHCI Subsystem Vendor
Identification
USB EHCI Subsystem Identification
Capabilities Pointer
Interrupt Line
3Dh
INT_PN
Interrupt Pin
50h
51h
52–53h
PWR_CAPID
NXT_PTR1
PWR_CAP
PCI Power Management Capability ID
Next Item Pointer
Power Management Capabilities
54–55h PWR_CNTL_STS Power Management Control/Status
58h
DEBUG_CAPID Debug Port Capability ID
59h
NXT_PTR2 Next Item Pointer #2
Default Value
8086h
265Ch
0000h
0290h
See register
description
20h
03h
0Ch
00h
00000000h
Type
RO
RO
R/W, RO
R/W, RO
RO
RO
RO
RO
RO
R/W, RO
XXXXh
R/W (special)
XXXXh
50h
00h
See register
description
01h
58h
C9C2h
0000h
0Ah
00h
R/W (special)
RO
R/W
RO
RO
R/W (special)
R/W (special)
R/W, R/WC,
RO
RO
RO
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
527