82801FB Datasheet, PDF (201/786 Pages) Intel Corporation – Intel I/O Controller Hub 6 (ICH6) Family

Functional Description
5.20 USB EHCI Host Controller (D29:F7)
The ICH6 contains an Enhanced Host Controller Interface (EHCI) compliant host controller which
supports up to eight USB 2.0 high-speed compliant root ports. USB 2.0 allows data transfers up to
480 Mb/s using the same pins as the eight USB full-speed/low-speed ports. The ICH6 contains
port-routing logic that determines whether a USB port is controlled by one of the UHCI controllers
or by the EHCI controller. USB 2.0 based Debug Port is also implemented in the ICH6.
A summary of the key architectural differences between the USB UHCI host controllers and the
EHCI host controller are shown in Table 5-45.
Table 5-45. UHCI vs. EHCI
Parameter
Accessible by
Memory Data Structure
Differential Signaling Voltage
Ports per Controller
USB UHCI
I/O space
Single linked list
3.3 V
2
USB EHCI
Memory Space
Separated in to Periodic and Asynchronous lists
400 mV
8
5.20.1
5.20.1.1
5.20.1.2
EHC Initialization
The following descriptions step through the expected ICH6 Enhanced Host Controller (EHC)
initialization sequence in chronological order, beginning with a complete power cycle in which the
suspend well and core well have been off.
BIOS Initialization
BIOS performs a number of platform customization steps after the core well has powered up.
Contact your Intel Field Representative for additional ICH6 BIOS information.
Driver Initialization
See Chapter 4 of the Enhanced Host Controller Interface Specification for Universal Serial Bus,
Revision 1.0.
Intel^® I/O Controller Hub 6 (ICH6) Family Datasheet
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