SH7713 Datasheet, PDF (90/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 2 CPU
Instruction Format
nm type
md type
15
0
xxxx xxxx mmmm dddd
nd4 type
15
0
xxxx xxxx nnnn dddd
nmd type
15
0
xxxx nnnn mmmm dddd
d type
15
0
xxxx xxxx dddd dddd
d12 type
15
0
xxxx dddd dddd dddd
nd8 type
15
0
xxxx nnnn dddd dddd
Source
Operand
Destination
Operand
Sample Instruction
mmmm: post-
nnnn: register
increment register direct
indirect
MOV.L @Rm+,Rn
mmmm: register
direct
nnnn: pre-
MOV.L Rm,@-Rn
decrement register
indirect
mmmm: register nnnn: indexed
direct
register indirect
MOV.L Rm,@(R0,Rn)
mmmmdddd:
R0 (register direct) MOV.B @(disp,Rm),R0
register indirect
with displacement
R0 (register direct) nnnndddd:
MOV.B R0,@(disp,Rn)
register indirect
with displacement
mmmm: register
direct
nnnndddd:
MOV.L Rm,@(disp,Rn)
register indirect
with displacement
mmmmdddd:
nnnn: register
register indirect direct
with displacement
MOV.L @(disp,Rm),Rn
dddddddd: GBR
indirect with
displacement
R0 (register direct) MOV.L @(disp,GBR),R0
R0 (register direct) dddddddd: GBR
indirect with
displacement
MOV.L R0,@(disp,GBR)
dddddddd:
PC-relative with
displacement
R0 (register direct) MOVA @(disp,PC),R0
dddddddd:
—
PC-relative
BF label
dddddddddddd: —
PC-relative
BRA label
(label=disp+PC)
dddddddd: PC-
relative with
displacement
nnnn: register
direct
MOV.L @(disp,PC),Rn
Rev.1.50 Aug. 30, 2006 Page 50 of 860
REJ09B0288-0150