SH7713 Datasheet, PDF (649/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 17 Serial I/O with FIFO (SIOF)
17.3.10 Serial Transmit Data Register (SITDR)
SITDR is used to specify the SIOF transmit data. The setting data for this register is stored in the
transmit FIFO. SITDR is initialized by a power-on reset, software reset, or transmit reset.
Bit
31 to 16
Initial
Bit Name Value
SITDL15 to All 0
SITDL0
15 to 0
SITDR15 to All 0
SITDR0
R/W
W
W
Description
Left Channel Transmit Data
Specify data to be output from the TXD_SIO pin as left
channel data. The position of the left channel data in the
transmission frame is specified by the TDLA bit in
SITDAR.
These bits are valid only when the TDLE bit in SITDAR is
set to 1.
Right Channel Transmit Data
Specify data to be output from the TXD_SIO pin as right
channel data. The position of the right channel data in the
transmission frame is specified by the TDRA bit in
SITDAR.
These bits are valid only when the TDLE bit and TLREP
bit in SITDAR are set to 1 and cleared to 0, respectively.
Rev.1.50 Aug. 30, 2006 Page 609 of 860
REJ09B0288-0150