SH7713 Datasheet, PDF (111/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
Section 3 DSP Operating Unit
3.1 DSP Extended Functions
This LSI incorporates a DSP unit and X/Y memory directly connected to the DSP unit. This LSI
supports the DSP extended function instruction sets needed to control the DSP unit and X/Y
memory. The DSP extended function instructions are divided into four groups.
Extended System Control Instructions for the CPU: If the DSP extended function is enabled,
the following extended system control instructions can be used for the CPU.
• Repeat loop control instructions and repeat loop control register access instructions are added.
Looped programs can be executed efficiently by using the zero-overhead repeat control unit.
For details, refer to section 3.3, CPU Extended Instructions.
• Modulo addressing control instructions and control register access instructions are added.
Function allows access to data with a circular structure. For details, refer to section 3.4, DSP
Data Transfer Instructions.
• DSP unit register access instructions are added. Some of the DSP unit registers can be used in
the same way as the CPU system registers. For details, refer to section 3.4, DSP Data Transfer
Instructions.
Data Transfer Instructions for Data Transfers between DSP Unit Registers and On-Chip
X/Y memory: Data transfer instructions for data transfers between the DSP unit registers and on-
chip X/Y memory are called double-data transfer instructions. Instruction codes for these double-
transfer instructions are 16 bit codes as well as CPU instruction codes. These data transfer
instructions perform data transfers between the DSP unit and on-chip X/Y memory that is directly
connected to the DSP unit. These data transfer instructions can be described in combination with
other DSP unit operation instructions. For details, refer to section 3.4, DSP Data Transfer
Instructions.
Data Transfer Instructions for Data Transfers between DSP Unit Registers and All Logical
Address Spaces: Data transfer instructions for data transfers between DSP unit registers and all
logical address spaces are called single-data transfer instructions. Instruction codes for the double-
transfer instructions are 16 bit codes as well as CPU instruction codes. These data transfer
instructions performs data transfers between the DSP unit registers and all logical address spaces.
For details, refer to section 3.4, DSP Data Transfer Instructions.
DSP Unit Operation Instructions: DSP unit operation instructions are called DSP data operation
instructions. These instructions are provided to execute digital signal processing operations at high
speed using the DSP. Instruction codes for these instructions are 32 bits. The DSP data operation
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