SH7713 Datasheet, PDF (587/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Initial
Bit
Bit Name Value
6
TEND
1
Section 16 Serial Communication Interface with FIFO (SCIF)
R/W
R/(W)*
Description
Transmit End
Indicates that there is no valid data in SCFTDR
when the last bit of the transmit character is sent,
and transmission has been ended.
0: Transmission is in progress
[Clearing conditions]
• When the TEND flag is cleared to 0 after the
transmit data is written to SCFTDR and TEND =
1 is read
• When data is written to SCFTDR by the DMAC
1: Transmission has been ended
[Setting conditions]
• Power-on reset or manual reset
• The TE bit in SCSCR is cleared to 0
• When there is no transmit data in SCFTDR on
transmission of the last bit of 1-byte serial
transmit character
Rev.1.50 Aug. 30, 2006 Page 547 of 860
REJ09B0288-0150