SH7713 Datasheet, PDF (225/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 5 Memory Management Unit (MMU)
256
H'0000 0000
Area P0
Cacheable
Address Translation Possible
External Address
Space
Area 0
Area 1
Area 2
Area 3
Area 4
Area 5
Area 6
Area 7
256
Area U0
Cacheable
Address Translation Possible
H'0000 0000
H'8000 0000
H'A000 0000
H'C000 0000
H'E000 0000
H'FFFF FFFF
Area P1
Cacheable
Address Translation Not Possible
Area P2
Non-Cacheable
Address Translation Not Possible
Area P3
Cacheable
Address Translation Possible
Area P4
Non-Cacheable
Address Translation Not Possible
Privileged Mode
Address Error
Area Uxy*
Address Error
User Mode
H'8000 0000
H'A500 0000
H'A5FF FFFF
H'FFFF FFFF
*: Only exists when SR.DSP = 1
Figure 5.2 Virtual Address Space (MMUCR.AT = 1)
Rev.1.50 Aug. 30, 2006 Page 185 of 860
REJ09B0288-0150