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| SH7713 Datasheet, PDF (838/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series | |||
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Section 24 Electrical Characteristics
24.3.4 Basic Timing
CKIO
A25 to A0
CSn
T1
tAD1
tAS
tCSD1
T2
tAD1
tCSD1
RD/WR
RD
Read
D31 to D0
tRWD1
tRSD
tRWD1
tRSD
tAH
tRDH1
tRDS1
Write
WEn
D31 to D0
BS
tWED
tWDD1
tBSD
tWED
tAH
tBSD
tWDH1
tWDH4
DACKn*
tDACD
tDACD
Note: * DACKn is a waveform when active-low is specified.
Figure 24.17 Basic Bus Cycle (No Wait)
Rev.1.50 Aug. 30, 2006 Page 798 of 860
REJ09B0288-0150
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