SH7713 Datasheet, PDF (11/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Contents
Section 1 Overview and Pin Function ...................................................................1
1.1 Features.................................................................................................................................. 1
1.2 Block Diagram ....................................................................................................................... 7
1.3 Pin Description....................................................................................................................... 8
1.3.1 Pin Assignment ......................................................................................................... 8
1.3.2 Pin Functions .......................................................................................................... 19
Section 2 CPU......................................................................................................27
2.1 Processing States and Processing Modes ............................................................................. 27
2.1.1 Processing States..................................................................................................... 27
2.1.2 Processing Modes ................................................................................................... 28
2.2 Memory Map ....................................................................................................................... 29
2.2.1 Logical Address Space............................................................................................ 29
2.2.2 External Memory Space.......................................................................................... 30
2.3 Register Descriptions ........................................................................................................... 32
2.3.1 General Registers.................................................................................................... 35
2.3.2 System Registers..................................................................................................... 36
2.3.3 Program Counter..................................................................................................... 37
2.3.4 Control Registers .................................................................................................... 38
2.4 Data Formats........................................................................................................................ 42
2.4.1 Register Data Format .............................................................................................. 42
2.4.2 Memory Data Formats ............................................................................................ 42
2.5 Features of CPU Core Instructions ...................................................................................... 44
2.5.1 Instruction Execution Method................................................................................. 44
2.5.2 CPU Instruction Addressing Modes ....................................................................... 45
2.5.3 CPU Instruction Formats ........................................................................................ 48
2.6 Instruction Set ...................................................................................................................... 52
2.6.1 CPU Instruction Set Based on Functions ................................................................ 52
2.6.2 Operation Code Map............................................................................................... 66
Section 3 DSP Operating Unit .............................................................................71
3.1 DSP Extended Functions ..................................................................................................... 71
3.2 DSP Mode Resources .......................................................................................................... 73
3.2.1 Processing Modes ................................................................................................... 73
3.2.2 DSP Mode Memory Map........................................................................................ 73
3.2.3 CPU Register Sets................................................................................................... 74
Rev.1.50 Aug. 30, 2006 Page xi of xl