SH7713 Datasheet, PDF (602/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Data Transfer Format: Table 16.5 shows the transfer formats that can be used in asynchronous
mode. Any of 8 transfer formats can be selected according to the SCSMR settings.
Table 16.5 Serial Transfer Formats
SCSMR Settings
Serial Transfer Format and Frame Length
CHR PE STOP 1 2 3 4 5 6 7 8 9 10 11 12
0
0
0
S
8-bit data
STOP
1
S
8-bit data
STOP STOP
1
0
S
8-bit data
P STOP
1
S
1
0
0
S
1
S
8-bit data
7-bit data
7-bit data
P STOP STOP
STOP
STOP STOP
1
0
S
1
S
S: Start bit
STOP: Stop bit
P: Parity bit
7-bit data
7-bit data
P STOP
P STOP STOP
Clock: The SCIF transfer clock is set by the C/A bit in SCSMR and the CKE1 and CKE0 bits in
SCSCR. For details, see table 16.4.
When an external clock is input to the SCIFnCK pin, the clock with frequency 16 times the bit rate
must be input.
When the SCIF operates on an internal clock, it can output a clock from the SCIFnCK pin. At this
time output clock frequency is 16 times the bit rate.
Rev.1.50 Aug. 30, 2006 Page 562 of 860
REJ09B0288-0150