SH7713 Datasheet, PDF (141/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
address (ME), respectively. The LDC and STC instructions are extended for MOD register
handling.
If the DMX bit of the SR register is set, the modulo addressing is specified for the X address
register. If the DMY bit of the SR register is set, the modulo addressing is specified for the Y
address register. Modulo addressing is valid for either the X or the Y address register, only; it
cannot be set for both at the same time. Therefore, DMX and DMY cannot both be set
simultaneously (if they are, the DMY setting will be valid). ( In the future, this specification may
be changed.) The DMX and DMY bits of the SR can be specified by the STC or LDC instruction
for the SR register.
If an exception is accepted during modulo addressing, the DMX and DMY bits of the SR and
MOD register must be saved. By restoring these register values, a control is returned to the
modulo addressing after an exception handling.
Table 3.11 Modulo Addressing Control Instructions
Instruction
STC MOD, Rn
STC.L MOD, @−Rn
LDC @Rn+, MOD
LDC Rn, MOD
Operation
MOD → Rn
Rn – 4 → Rn, MOD → (Rn)
(Rn) → MOD, Rn + 4 → Rn
Rn → MOD
Execution States
1
1
4
4
Rev.1.50 Aug. 30, 2006 Page 101 of 860
REJ09B0288-0150