SH7713 Datasheet, PDF (628/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 17 Serial I/O with FIFO (SIOF)
17.1.1 Block Diagram
Figure 17.1 shows a block diagram of the SIOF.
P_CLK
32
Peripheral bus
Bus I/F
16
Control
register
32
32
Transmit FIFO
(32 bits ×
16 stages)
32
32
32
Receive FIFO
(32 bits ×
16 stages)
Baud rate ^1/nMCLK
generator
Timing
control
Transmit control
data
Receive control
data
P/S
S/P
SIOMCLK
SCK_SIO SIOFSYNC
TXD_SIO
Figure 17.1 Block Diagram of SIOF
RXD_SIO
Rev.1.50 Aug. 30, 2006 Page 588 of 860
REJ09B0288-0150