SH7713 Datasheet, PDF (145/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
Table 3.13 Single Data Transfer Instruction Formats
Type
Mnemonic
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Single
data
transfer
MOVS.W @-As,Ds 1 1 1 1 0 1 As
MOVS.W @As,Ds
0:R4
MOVS.W @As+,Ds
1:R5
Ds 0:(*)
1:(*)
2:(*)
0000
01
10
MOVS.W @As+Is,Ds
2:R2
3:(*)
11
MOVS.W Ds,@-As
3:R3
4:(*)
0001
MOVS.W Ds,@As
5:A1
01
MOVS.W Ds,@As+
6:(*)
10
MOVS.W Ds,@As+Is
7:A0
11
MOVS.L @-As,Ds
8:X0
0010
MOVS.L @As,Ds
9:X1
01
MOVS.L @As+,Ds
A:Y0 1 0
MOVS.L @As+Is,Ds
B:Y1 1 1
MOVS.L Ds,@-As
C:M0 0 0 1 1
MOVS.L Ds,@As
D:A1G 0 1
MOVS.L Ds,@As+
E:M1 1 0
MOVS.L Ds,@As+Is
F:A0G 1 1
Note: * Codes reserved for system use.
Rev.1.50 Aug. 30, 2006 Page 105 of 860
REJ09B0288-0150