SH7713 Datasheet, PDF (490/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 12 Bus State Controller (BSC)
If all 32 Mbytes of the memory space are used as an IC memory card interface, the REG signal
that switches between the common memory and attribute memory can be generated by a port. If
the memory space used for the IC memory card interface is 16 Mbytes or less, the A24 pin can be
used as the REG signal by using the memory space as a 16-Mbyte common memory space and a
16-Mbyte attribute memory space.
PCMCIA interface area is 32 Mbytes (An I/O port is used as the REG)
Area 5 : H'14000000
Area 5 : H'16000000
Area 6 : H'18000000
Area 6 : H'1A000000
Attribute memory/common memory
I/O space
Attribute memory/common memory
I/O space
PCMCIA interface area is 16 Mbytes (A24 is used as the REG)
Area 5 : H'14000000
Area 5 : H'15000000
Area 5 : H'16000000
H'17000000
Area 6 : H'18000000
Area 6 : H'19000000
Area 6 : H'1A000000
H'1B000000
Attribute memory
Common memory
I/O space
Attribute memory
Common memory
I/O space
Figure 12.41 Example of PCMCIA Space Assignment (CS5BWCR.SA[1:0] = B′10,
CS6BWCR.SA[1:0] = B′10)
Basic Timing for I/O Card Interface: Figures 12.42 and 12.43 show the basic timings for the
PCMCIA I/O card interface.
The I/O card and IC memory card interfaces can be switched using an address to be accessed. If
area 5 of the physical space is specified as the PCMCIA, the I/O card interface can automatically
be accessed by accessing the physical addresses from H’16000000 to H’17FFFFFF. If area 6 of
the physical space is specified as the PCMCIA, the I/O card interface can automatically be
accessed by accessing the physical addresses from H′1A000000 to H′1BFFFFFF.
Note that areas to be accessed as the PCMCIA I/O card must be non-cached if they are logical
space (space P2 or P3) areas, or a non-cached area specified by the MMU.
Rev.1.50 Aug. 30, 2006 Page 450 of 860
REJ09B0288-0150