SH7713 Datasheet, PDF (113/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
3.2 DSP Mode Resources
3.2.1 Processing Modes
The CPU processing modes can be extended using the mode bit (MD) and DSP bit (DSP) of the
status register (SR), as shown below.
Description
Access of Resources
Protected in Privileged Mode
or Privileged Instruction
DSP Extended
MD DSP Processing Mode Execution
Functions
0
0
User mode
Prohibited
Invalid
0
1
User DSP mode
Prohibited
Valid
1
0
Privileged mode
Allowed
Invalid
1
1
Privileged DSP mode Allowed
Valid
As shown above, the extension of the DSP function by the DSP bit can be specified independently
of the control by the MD bit. Note, however, that the DSP bit can be modified only in privileged
mode. Before the DSP bit is modified, a transition to privileged mode or privileged DSP mode is
necessary.
3.2.2 DSP Mode Memory Map
In DSP mode, a part of the P2 area in the logical address space can be accessed in user DSP mode.
When this area is accessed in user DSP mode, this area is referred to as a Uxy area. X/Y memory
is then assigned to this Uxy area. Accordingly, X/Y memory can also be accessed in user DSP
mode.
Table 3.1 Logical Address Space
Address Range
H'A5000000 to
H'A5FFFFFF
Name
P2/Uxy
Protection
Privileged or DSP
Description
16-Mbyte physical address space, non-
cacheable, non-address translatable
Can be accessed in privileged mode,
privileged DSP mode, and user DSP mode
Rev.1.50 Aug. 30, 2006 Page 73 of 860
REJ09B0288-0150