SH7713 Datasheet, PDF (356/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 11 On-Chip Oscillation Circuits
Pin Values
Mode MD2 MD1 MD0
5
1
0
1
6
1
1
0
7
1
1
1
Clock I/O
Source Output
EXTAL CKIO
CKIO2
Crystal CKIO
resonator _CKIO2
CKIO 
PLL2
On/Off
ON
(x 2)
ON
(x 2)
OFF
PLL1
On/Off
ON
(x 1, 2, 3)
ON
(x 1, 2, 3)
ON
(x 1, 2, 3)
CKIO
Frequency
(EXTAL) x 2
(Crystal) x 2
(CKIO)
Mode 0: An external clock is input from the EXTAL pin and undergoes waveform shaping by PLL
circuit 2 before being supplied inside this LSI. An input clock frequency of 33.3 MHz to
66.67 MHz can be used, and the CKIO frequency range is 33.3 MHz to 66.67 MHz.
Mode 1: An external clock is input from the EXTAL pin and its frequency is multiplied by 4 by PLL
circuit 2 before being supplied inside this LSI, allowing a low-frequency external clock to
be used. An input clock frequency of 10.00 MHz to 16.67 MHz can be used, and the
CKIO frequency range is 40.00 MHz to 66.67 MHz.
Mode 2: The on-chip crystal oscillator operates, with the oscillation frequency being multiplied by 4
by PLL circuit 2 before being supplied inside this LSI, allowing a low-frequency external
clock to be used. A crystal oscillation frequency of 10.00 MHz to 16.67 MHz can be used,
and the CKIO frequency range is 40.00 MHz to 66.67 MHz.
Mode 4: The on-chip crystal oscillator operates and undergoes waveform shaping by PLL circuit 2
before being supplied inside this LSI. A crystal oscillation frequency of 33.34 MHz to
48.00 MHz can be used, and the CKIO frequency range is 33.34 MHz to 48.00 MHz.
Mode 5: An external clock is input from the EXTAL pin and its frequency is multiplied by 2 by PLL
circuit 2 before being supplied inside this LSI, allowing a low-frequency external clock to
be used. An input clock frequency of 16.67 MHz to 33.34 MHz can be used, and the
CKIO frequency range is 33.34 MHz to 66.67 MHz.
Mode 6: The on-chip crystal oscillator operates, with the oscillation frequency being multiplied by 2
by PLL circuit 2 before being supplied inside this LSI, allowing a low-frequency clock to
be used. A crystal oscillation frequency of 10.00 MHz to 16.67 MHz can be used, and the
CKIO frequency range is 40.00 MHz to 66.67 MHz
Mode 7: In this mode, the CKIO pin is an input, an external clock is input to this pin, and
undergoes waveform shaping and also frequency multiplication according to the setting,
by PLL circuit 1 before being supplied to this LSI. As PLL circuit 1 compensates for
fluctuations in the CKIO pin load, this mode is suitable for connection of synchronous
DRAM.
Rev.1.50 Aug. 30, 2006 Page 316 of 860
REJ09B0288-0150