SH7713 Datasheet, PDF (128/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
The CPU always executes a program with comparing the repeat end register (RE) and the
program counter (PC). If the PC matches the RE while the RC[11:0] bits of the SR register are
other than 0, the repeat control function is initiated.
 If RC ≥ 2, a control is passed to a repeat start instruction after a repeat end instruction has
been executed. The RC is decremented by 1 at the completion of the repeat end instruction.
In this case, restrictions 1 to 6 are also applied.
 If RC == 1, the RC is decremented to 0 at the completion of the repeat end instruction and
a control is passed to the subsequent instruction. In this case, restrictions 1 to 6 are also
applied.
 If RC == 0, the repeat control function is not initiated even if a repeat detection instruction
is executed. The repeat loop is executed once as normal instructions and a control is not be
passed to a repeat start instruction even if a repeat end instruction is executed.
3.3.2 Extended Repeat Control Instructions
In the repeat control function described in section 3.3.1, Repeat Control Instructions, there are
some restrictions. To reduce these restrictions, this LSI supports the extended repeat instructions
to extend the repeat control function. These extended repeat control instructions were not
supported in the conventional SH-DSP. To keep compatibility with the conventional SH-DSP, use
the conventional repeat control instructions called compatible repeat control instructions.
Program Examples Using the Extended Repeat Control Instructions: Examples of repeat loop
programs using the extended repeat control instructions are shown below.
Rev.1.50 Aug. 30, 2006 Page 88 of 860
REJ09B0288-0150