SH7713 Datasheet, PDF (654/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 17 Serial I/O with FIFO (SIOF)
Table 17.2 shows an example of serial clock frequency.
Table 17.2 SIOF Serial Clock Frequency
Frame Length
32 bits
64 bits
128 bits
256 bits
8 kHz
256 kHz
512 kHz
1.024 MHz
2.048 MHz
Sampling Rate
44.1 kHz
48 kHz
1.4112 MHz
1.536 MHz
2.8224 MHz
3.072 MHz
5.6648 MHz
6.144 MHz
11.2896 MHz 12.288 MHz
96 kHz
3.072 MHz



17.4.2 Serial Timing
SIOFSYNC: The SIOFSYNC is a frame synchronous signal. Depending on the transfer mode, it
has the following two functions.
• Synchronous pulse: 1-bit-width pulse indicating the start of the frame
• L/R: 1/2-frame-width pulse indicating the left channel stereo data (L) in high level and the
right channel stereo data (R) in low level
Figure 17.3 shows the SIOFSYNC synchronization timing. The timing of master mode 1, slave
mode 1, and slave mode 2 is shown in (a) in figure 17.3. The timing of master mode 2 is shown in
(b) in figure 17.3.
Rev.1.50 Aug. 30, 2006 Page 614 of 860
REJ09B0288-0150