SH7713 Datasheet, PDF (61/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Classification Symbol
I/O
Interrupts
NMI
I
IRQ5 to IRQ0 I
Address bus
Data bus
Bus control
IRL3 to IRL0 I
IRQOUT
O
A25 to A0
O
D31 to D0
I/O
CS0,
O
CS2 to CS4,
CS5A, CS6A,
CS5B/CE1A,
CS6B/CE1B,
CE2A, CE2B
RD
O
RD/WR
O
BS
O
WE3(BE3)/
O
ICIOWR
WE2(BE2)/
O
ICIORD
WE1(BE1)/
O
WE
Section 1 Overview and Pin Function
Name
Function
Non-maskable Non-maskable interrupt request
interrupt
pin. Fix to high when not in use.
Interrupt
requests 5 to 0
Maskable interrupt request pins.
Selectable as level input or edge
input. The rising edge, falling
edge, and both edges are
selectable as edges.
Interrupt request 15-level interrupt request pins.
Interrupt request Indicates that the interrupt request
output
is occurred.
Address bus Outputs addresses.
Data bus
32-bit bidirectional bus.
Chip select 0,
2 to 4, 5A, 5B,
6A, 6B
PCMCIA card
select
Chip-select signals for external
memory or devices.
PCMCIA card select signal when
PCMCIA is used.
Read
Read/write
Bus start
Byte write
Byte write
Byte write
Indicates reading of data from
external devices.
Read/write signal
Bus-cycle start signal
Indicates that bits 31 to 24 of the
data in the external memory or
device are being written. I/O write
strobe signal when PCMCIA is
used.
Indicates that bits 23 to 16 of the
data in the external memory or
device are being written. I/O read
strobe signal when PCMCIA is
used.
Indicates that bits 15 to 8 of the
data in the external memory or
device are being written. Memory
write strobe signal when PCMCIA
is used.
Rev.1.50 Aug. 30, 2006 Page 21 of 860
REJ09B0288-0150