SH7713 Datasheet, PDF (339/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Bit
7
6 to 3
2
1
0
Section 10 Power-Down Modes
Bit Name Initial Value R/W
STBY
0
R/W

All 0
R
MSTP2 0
R/W
MSTP1 0
R/W

0
R
Description
Software Standby
Specifies transition to software standby mode.
0: Executing SLEEP instruction puts chip into sleep
mode
1: Executing SLEEP instruction puts chip into
software standby mode
Reserved
These bits are always read as 0. The write value
should always be 0.
Module Stop Bit 2
When the MSTP2 bit is set to 1, the supply of the
clock to the TMU is halted.
0: TMU runs
1: Clock supply to TMU halted
Module Stop Bit 1
When the MSTP1 bit is set to 1, the supply of the
clock to the RTC is halted.
0: RTC runs
1: Clock supply to RTC halted
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev.1.50 Aug. 30, 2006 Page 299 of 860
REJ09B0288-0150