SH7713 Datasheet, PDF (136/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
Table 3.9 Extended System Control Instructions in DSP Mode
Instruction
STS DSR,Rn
STS A0,Rn
STS X0,Rn
STS X1,Rn
STS Y0,Rn
STS Y1,Rn
STS.L DSR,@-Rn
STS.L A0,@-Rn
STS.L X0,@-Rn
STS.L X1,@-Rn
STS.L Y0,@-Rn
STS.L Y1,@-Rn
LDS.L @Rn+,DSR
LDS.L @Rn+,A0
LDS.L @Rn+,X0
LDS.L @Rn+,X1
LDS.L @Rn+,Y0
LDS.L @Rn+,Y1
LDS Rn,DSR
LDS Rn,A0
LDS Rn,X0
LDS Rn,X1
LDS Rn,Y0
LDS Rn,Y1
Operation
DSR → Rn
A0 → Rn
X0 → Rn
X1 → Rn
Y0 → Rn
Y1 → Rn
Rn – 4 → Rn, DSR → (Rn)
Rn – 4 → Rn, A0 → (Rn)
Rn – 4 → Rn, X0 → (Rn)
Rn – 4 → Rn, X1 → (Rn)
Rn – 4 → Rn, Y0 → (Rn)
Rn – 4 → Rn, Y1 → (Rn)
(Rn) → DSR, Rn + 4 → Rn
(Rn) → A0, Rn + 4 → Rn
(Rn) → X0, Rn + 4 → Rn
(Rn) → X1, Rn + 4 → Rn
(Rn) → Y0, Rn + 4 → Rn
(Rn) → Y1, Rn + 4 → Rn
Rn → DSR
Rn → A0
Rn → X0
Rn → X1
Rn → Y0
Rn → Y1
Execution States
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Rev.1.50 Aug. 30, 2006 Page 96 of 860
REJ09B0288-0150