SH7713 Datasheet, PDF (629/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 17 Serial I/O with FIFO (SIOF)
17.2 Input/Output Pins
The pin configuration of the SIOF0/1 is shown in table 17.1.
Table 17.1 Pin Configuration
Channel
0
Name
Abbreviation
Clock input pin SIOMCLK0
Communication SCK_SIO0
clock pin
Frame
SIOFSYNC0
synchronous pin
Transmit data pin TXD_SIO0
Receive data pin RXD_ SIO0
1
Clock input pin SIOMCLK1
Communication SCK_SIO1
clock pin
Frame
SIOFSYNC1
synchronous pin
Transmit data pin TXD_SIO1
Receive data pin RXD_SIO1
I/O
Input
Input/
output
Input/
output
Output
Input
Input
Input/
output
Input/
output
Output
Input
Function
Master clock input
Serial clock (common to
transmission/reception)
Frame synchronous signal
(common to transmission/reception)
Transmit data
Receive data
Master clock input
Serial clock (common to
transmission/reception)
Frame synchronous signal
(common to transmission/reception)
Transmit data
Receive data
Rev.1.50 Aug. 30, 2006 Page 589 of 860
REJ09B0288-0150