SH7713 Datasheet, PDF (560/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 15 Realtime Clock (RTC)
Bit
Bit Name
15 to 12 
Initial Value R/W

R/W
11 to 8 

R/W
7 to 4 

R/W
3 to 0 

R/W
Description
Setting value for 1000-unit of year alarm in the
BCD-code.
The range can be set from 0 to 9 (decimal).
Setting value for 100-unit of year alarm in the
BCD-code.
The range can be set from 0 to 9 (decimal).
Setting value for 10-unit of year alarm in the
BCD-code.
The range can be set from 0 to 9 (decimal).
Setting value for 1-unit of year alarm in the BCD-
code.
The range can be set from 0 to 9 (decimal).
15.3.16 RTC Control Register 1 (RCR1)
RCR1 is a register that affects carry flags and alarm flags. It also selects whether to generate
interrupts for each flag. Because flags are sometimes set after an operand read, do not use this
register in read-modify-write processing.
RCR1 is an 8-bit readable/writable register. RCR1 is initialized to H'00 by a power-on reset or a
manual reset, all bits are initialized to 0 except for the CF flag, which is undefined. When using
the CF flag, it must be initialized beforehand. This register is not initialized in standby mode.
Bit
Bit Name Initial Value R/W Description
7
CF
Undefined R/W Carry Flag
Status flag that indicates that a carry has
occurred. CF is set to 1 when a count-up to
R64CNT or RSECCNT occurs. A count register
value read at this time cannot be guaranteed;
another read is required.
0: No count up of R64CNT or RSECCNT.
Clearing condition: When 0 is written to CF
1: Count up of R64CNT or RSECCNT.
Setting condition: When 1 is written to CF or if
the carry of R64CNT or RSECCNT occurs
when R64CNT or RSECCNT is read.
Rev.1.50 Aug. 30, 2006 Page 520 of 860
REJ09B0288-0150