SH7713 Datasheet, PDF (657/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 17 Serial I/O with FIFO (SIOF)
Table 17.4 Frame Length
FL3 to FL0 Slot Length
00xx
8
0100
8
0101
8
0110
8
0111
8
10xx
16
1100
16
1101
16
1110
16
1111
16
[Legend]
x:
Don't care.
Number of Bits in a Frame
8
16
32
64
128
16
32
64
128
256
Transfer Data
8-bit monaural data
8-bit monaural data
8-bit monaural data
8-bit monaural data
8-bit monaural data
16-bit monaural data
16-bit monaural/stereo data
16-bit monaural/stereo data
16-bit monaural/stereo data
16-bit monaural/stereo data
Slot Position: The SIOF can specify the position of transmit data, receive data, and control data
(common to transmission and reception) by slot numbers. The slot number of each data is
specified by the following registers.
• Transmit data: SITDAR
• Receive data: SIRDAR
• Control data: SICDAR
Only 16-bit slot leugth is valid for control register. In addition, control data is always assigned to
the same slot number both in transmission and reception.
17.4.4 Register Allocation of Transfer Data
Transmit/Receive Data: Writing and reading of transmit or receive data are performed for the
following registers.
• Transmit data writing: SITDR (32-bit access)
• Receive data reading: SIRDR (32-bit access)
Rev.1.50 Aug. 30, 2006 Page 617 of 860
REJ09B0288-0150