SH7713 Datasheet, PDF (152/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
Table 3.17 DSP Operation Instruction Formats
Type
Double data operation instructions
Conditional single data operation
instructions
Unconditional single data operation
instructions
Instruction Formats
ALUop. Sx, Sy, Du
MLTop. Se, Df, Dg
DCT ALUop. Sx, Sy, Dz
DCF ALUop. Sx, Sy, Dz
DCT ALUop. Sx, Dz
DCF ALUop. Sx, Dz
DCT ALUop. Sy, Dz
DCF ALUop. Sy, Dz
ALUop. Sx, Sy, Dz
ALUop. Sx, Dz
ALUop. Sy, Dz
MLTop. Se, Sf, Dg
Table 3.18 Correspondence between DSP Instruction Operands and Registers
Register Sx
A0
Yes
A1
Yes
M0
M1
X0
Yes
X1
Yes
Y0
Y1
ALU/Shift Operations
Sy
Dz
Du
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Multiply Operations
Se
Sf
Dg
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
When writing parallel instructions, the B-field instruction is written first, followed by the A-field
instruction. A sample parallel processing program is shown in figure 3.6.
Rev.1.50 Aug. 30, 2006 Page 112 of 860
REJ09B0288-0150