SH7713 Datasheet, PDF (130/904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
• Example 3: Repeat loop consisting of two instructions
LDRS RptStart
; Sets repeat start instruction address
to the RS register
LDRE RptEnd
; Sets repeat end instruction address
to the RE register
LDRC #4
; Sets the number of repetitions (4) to
the RC[11:0] bits of the SR register
instr0
; At least one instruction is required
from LDRC instruction to [Repeat start
instruction]
RptStart: instr1
; [Repeat start instruction]
RptEnd: instr2
; [Repeat end instruction]
• Example 4: Repeat loop consisting of one instructions
LDRS RptStart
; Sets repeat start instruction address
to the RS register
LDRE RptEnd
; Sets repeat end instruction address
to the RE register
LDRC #4
; Sets the number of repetitions (4) to
the RC[11:0] bits of the SR register
instr0
Rptstart:
; At least one instruction is required
from LDRC instruction to [Repeat start
instruction] RptStart:
RptEnd: instr1
; [Repeat start instruction]=
[Repeat end instruction]
In extended repeat control instructions, a repeat start instruction address and a repeat end
instruction address are stored in the RS register and RE register, respectively, regardless of the
number of repeat instructions. In addition, the extended repeat control can be performed by using
the LDRC instruction instead of the SETRC instruction. During the extended repeat control, a
repeat loop can be recognized by executing a repeat end instruction. Therefore, there is no
restriction on branches or exceptions.
Extended Repeat Control Instructions: To describe the extended repeat loop, the repeat start
and end addresses must be specified to the RS and RE registers by the LDRS and LDRE
instructions, respectively. For the LDRS and LDRE instructions of the extended repeat control
instructions, the LDRS and LDRE instructions of the compatible repeat control instructions are
used. The number of repetitions are specified by the LDRC instruction. An 8-bit immediate data or
the general register values can be used as an operand of the LDRC instruction. If 256 or greater
value is specified to the RC, use the LDRC Rm type instructions.
Rev.1.50 Aug. 30, 2006 Page 90 of 860
REJ09B0288-0150