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SH7670 Datasheet, PDF (96/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
Section 2 CPU
2.4.10 Bit Manipulation Instructions
Table 2.19 Bit Manipulation Instructions
Instruction
Instruction Code Operation
Execu-
Compatibility
tion
SH2,
Cycles T Bit SH2E SH4 SH-2A
BAND.B #imm3,@(disp12,Rn) 0011nnnn0iii1001 (imm of (disp + Rn)) & T → 3
Ope-
Yes
0100dddddddddddd
ration
result
BANDNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii1001 ~(imm of (disp + Rn)) & T → T 3
Ope-
Yes
1100dddddddddddd
ration
result
BCLR.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 0 → (imm of (disp + Rn))
3

Yes
0000dddddddddddd
BCLR
#imm3,Rn
10000110nnnn0iii 0 → imm of Rn
1

Yes
BLD.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 (imm of (disp + Rn)) →
3
Ope-
Yes
0011dddddddddddd
ration
result
BLD
#imm3,Rn
10000111nnnn1iii imm of Rn → T
1
Ope-
Yes
ration
result
BLDNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii1001 ~(imm of (disp + Rn))
3
Ope-
Yes
1011dddddddddddd → T
ration
result
BOR.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 ( imm of (disp + Rn)) | T → T 3
Ope-
Yes
0101dddddddddddd
ration
result
BORNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii1001 ~( imm of (disp + Rn)) | T → T 3
Ope-
Yes
1101dddddddddddd
ration
result
BSET.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 1 → ( imm of (disp + Rn))
3

Yes
0001dddddddddddd
BSET
#imm3,Rn
10000110nnnn1iii 1 → imm of Rn
1

Yes
BST.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 T → (imm of (disp + Rn))
3

Yes
0010dddddddddddd
BST
#imm3,Rn
10000111nnnn0iii T → imm of Rn
1

Yes
Rev. 1.00 Nov. 14, 2007 Page 70 of 1262
REJ09B0437-0100