SH7670 Datasheet, PDF (480/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Initial
Bit
Bit Name value R/W Description
9
CDCE
0
R/W CD Bit Copy Directive
0: Indicates the CD bit state in bit TFS1 of the transmit
descriptor
1: Occurrence of the corresponding interrupt is not
indicated in bit TFS1 of the transmit descriptor
8
TROCE 0
R/W TRO Bit Copy Directive
0: Indicates the TRO bit state in bit TFS0 of the receive
descriptor
1: Occurrence of the corresponding interrupt is not
indicated in bit TFS0 of the receive descriptor
7
RMAFCE 0
R/W RMAF Bit Copy Directive
0: Indicates the RMAF bit state in bit RFS7 of the
receive descriptor
1: Occurrence of the corresponding interrupt is not
indicated in bit RFS7 of the receive descriptor
6, 5

All 0
R Reserved
These bits are always read as 0. The write value should
always be 0.
4
RRFCE
0
R/W RRF Bit Copy Directive
0: Indicates the RRF bit state in bit RFS4 of the receive
descriptor
1: Occurrence of the corresponding interrupt is not
indicated in bit RFS4 of the receive descriptor
3
RTLFCE 0
R/W RTLF Bit Copy Directive
0: Indicates the RTLF bit state in bit RFS3 of the receive
descriptor
1: Occurrence of the corresponding interrupt is not
indicated in bit RFS3 of the receive descriptor
2
RTSFCE 0
R/W RTSF Bit Copy Directive
0: Indicates the RTSF bit state in bit RFS2 of the
receive descriptor
1: Occurrence of the corresponding interrupt is not
indicated in bit RFS2 of the receive descriptor
Rev. 1.00 Nov. 14, 2007 Page 454 of 1262
REJ09B0437-0100