SH7670 Datasheet, PDF (585/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 15 Stream Interface (STIF)
Initial
Bit
Bit Name Value R/W Description
13
PWMSEL 0
R/W Selects difference (internal STC - internal PCR) result or
PWMR value for use as the input to selector 2 (figure 15.9).
Also selects PCR arrival pulse or PWMWP as the pulse for
reflecting the selector 2 output in the PWM output.
0: PWM control mode is set for the difference (internal STC
- internal PCR) result control. PCR arrival pulse and
PWMWP are available.
1: PWM control mode is set for the PWMR control.
Only PWMWP is available.
12
PWMSEL2 0
R/W Selects selector 1 (figure 15.9) or addition (selector 1 output
+ internal PWM) result for use as input to the internal PWM.
0: Selector 1 output is set for input to the internal PWM.
1: Addition (selector 1 output + internal PWM) result is set
for input to the internal PWM.
11
PWMCYC3 0
10
PWMCYC2 0
9
PWMCYC1 0
8
PWMCYC0 0
R/W These bits set a PWM control cycle value based on the
R/W ^{PWM reference clock that is set by the PWMDIV bits.}
R/W ^{See table 15.2.}
R/W ^{This setting should be modified only when the PIDEN bit is}
0.
7
PWMSFT3 0
R/W These bits set a reference bit position that is used to specify
6
PWMSFT2 0
R/W ^{the PWM control variable (internal STC - internal PCR). As}
shown in figure 15.9, the reference bit position of the PWM
5
PWMSFT1 0
R/W _{control variable varies with the PWMSFT value.}
4
PWMSFT0 0
R/W _{This setting should be modified only when the PIDEN bit is}
0.
Reference bit position
Reference bit position
0000: 0
1000: 8
0001: 1
1001: 9
0010: 2
1010: 10
0011: 3
1011: 11
0100: 4
1100: 12
0101: 5
1101: 13
0110: 6
1110: 14
0111: 7
1111: 15
Rev. 1.00 Nov. 14, 2007 Page 559 of 1262
REJ09B0437-0100