SH7670 Datasheet, PDF (339/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 8 Direct Memory Access Controller (DMAC)
8.3.6 DMA Reload Destination Address Registers (RDAR)
The DMA reload destination address registers (RDAR) are 32-bit readable/writable registers.
When the DAR reload function is enabled, the RDAR value is written to the destination address
register (SAR) at the end of the current DMA transfer. In this case, a new value for the next DMA
transfer can be preset in RDAR during the current DMA transfer. When the DAR reload function
is disabled, RDAR is ignored.
To transfer data in word (2-byte), longword (4-byte), or 16-byte unit, specify the address with 2-
byte, 4-byte, or16-byte address boundary respectively.
Bit:
Initial value:
R/W:
31

0
R/W
30

0
R/W
29

0
R/W
28

0
R/W
27

0
R/W
26

0
R/W
25

0
R/W
24

0
R/W
23

0
R/W
22

0
R/W
21

0
R/W
20

0
R/W
19

0
R/W
18

0
R/W
17

0
R/W
16

0
R/W
Bit:
Initial value:
R/W:
15

0
R/W
14

0
R/W
13

0
R/W
12

0
R/W
11

0
R/W
10

0
R/W
9

0
R/W
8

0
R/W
7

0
R/W
6

0
R/W
5

0
R/W
4

0
R/W
3

0
R/W
2

0
R/W
1

0
R/W
0

0
R/W
Rev. 1.00 Nov. 14, 2007 Page 313 of 1262
REJ09B0437-0100