SH7670 Datasheet, PDF (833/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 17 USB 2.0 Host/Function Module (USB)
(c) Status Stage
Control transfers are terminated by setting the CCPL bit to 1 with the PID bit in DCPCTR set to
PID = BUF.
After the above settings have been entered, this module automatically executes the status stage in
accordance with the data transfer direction determined at the setup stage. The specific procedure is
as follows.
(i) For control read transfers:
This module sends a zero-length packet and receives an ACK response from the USB host.
(ii) For control write transfers and no-data control transfers:
The zero-length packet is received from the USB host, and this module sends an ACK response.
(d) Control Transfer Auto Response Function
This module automatically responds to a normal SET_ADDRESS request. If any of the following
errors occur in the SET_ADDRESS request, a response from the software is necessary.
(i) Any transfer other than a control read transfer: bmRequestType ≠ H'00
(ii) If a request error occurs: wIndex ≠ H'00
(ii) For any transfer other than a no-data control transfer: wLength ≠ H'00
(iv) If a request error occurs: wValue > H'7F
(v) Control transfer of a device state error: DVSQ = 011 (Configured)
For all requests other than the SET_ADDRESS request, a response is required from the
corresponding software.
Rev. 1.00 Nov. 14, 2007 Page 807 of 1262
REJ09B0437-0100