SH7670 Datasheet, PDF (500/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)
(b) Transmit Descriptor 1 (TD1)
TD1 specifies the transmit buffer length (maximum 64 Kbytes).
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
TDL[15:0]
Initial Value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
















Initial Value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Initial
Bit
Bit Name value R/W Description
31 to 16 TDL[15:0] All 0
R/W Transmit Buffer Data Length
These bits specify the valid transfer byte length in the
corresponding transmit buffer.
When the one frame/multi-buffer system is specified
(TD0 and TFP = 10 or 00), the transfer byte length
specified in the descriptors at the start and midway
can be set in byte units.
15 to 0 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
(c) Transmit Descriptor 2 (TD2)
TD2 specifies the 32-bit transmit buffer start address. The transmit buffer start address setting can
be aligned with a byte, a word, or a longword boundary.
Rev. 1.00 Nov. 14, 2007 Page 474 of 1262
REJ09B0437-0100