SH7670 Datasheet, PDF (609/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 15 Stream Interface (STIF)
E. The CPU converts the read STSTC0R/STSTC1R and STPCR0R/STPCR1R values to
binary ones with STCbin and PCRbin respectively using the expression (1) in section
15.6.1, Operation of PCR Clock Recovery, step 4, and then calculates the difference
(STCbin - PCRbin). To be set in STPWMR as a PWM control variable, specify the
difference (STCbin - PCRbin) as a two's complement of the acceptable comparison bit
count n (n: sign bit) specified by the PWMCYC bits. Set a value within the range of -(2^n -
1) to +(2^n - 1) for the difference. Do not set the value -2^n. The CPU also determines the
handling of PCR data errors shown in step 6of Example 1.
F. The PWM control variable that is set in STPWMR can be reflected in the PWM control
output by writing 1 to PWMWP.
G. For the principle of VCXO clock frequency adjustment using the PWM control output, the
descriptions in steps 7 and 8 of Example 1 apply.
Table 15.4 PCR Extraction Conditions
transport_error_ adaptation_field_ adaptation_field_length PCR_flag
indicator
control
PCR Extraction*
0
00
don't care
don't care Impossible
01
don't care
don't care Impossible
10
0 ≤ len < 7
don't care Impossible
7 ≤ len < H'FF
0
Impossible
1
Possible
11
0 ≤ len < 7
don't care Impossible
7 ≤ len < H'FF
0
Impossible
1
Possible
1
don't care
don't care
don't care Impossible
Note: * When PCR extraction is possible, PCR is extracted and a PCR arrival pulse is
generated.
Rev. 1.00 Nov. 14, 2007 Page 583 of 1262
REJ09B0437-0100