SH7670 Datasheet, PDF (1287/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

STCNTVR .......................................... 553
STCTLR ............................................. 550
STDBGR ............................................ 570
STIER ................................................. 557
STLKCR............................................. 567
STMDR .............................................. 547
STPCR0R ........................................... 565
STPCR1R ........................................... 565
STPWMCR......................................... 562
STPWMMR........................................ 558
STPWMR ........................................... 564
STSTC0R ........................................... 566
STSTC1R ........................................... 566
STSTR ................................................ 553
SYSCFG ............................................. 635
SYSCR1 ............................................. 384
SYSCR2 ............................................. 386
SYSCR3 ............................................. 388
SYSSTS.............................................. 640
TBRAR............................................... 461
TDFAR ............................................... 462
TDLAR............................................... 443
TESTMODE....................................... 648
TFTR .................................................. 456
TIER ................................................... 556
TLFRCR ............................................. 418
TPAUSER .......................................... 424
TRIMD ............................... 465, 467, 468
TROCR............................................... 411
TRSCER ............................................. 453
TSFRCR ............................................. 417
UFRMNUM........................................ 695
USBADDR ......................................... 696
USBINDX .......................................... 700
USBLENG.......................................... 701
USBREQ ............................................ 697
USBVAL ............................................ 699
WRCSR .............................................. 366
WTCNT .............................................. 363
WTCSR .............................................. 364
Registers bank error
exception handling .......................... 119, 165
Registers bank errors............................... 119
Registers bank exception ........................ 165
Registers banks ................................. 33, 161
Relationship between access size
and number of bursts............................... 247
Relationship between refresh requests
and bus cycles ......................................... 265
Reset state ................................................. 73
Restoration from bank............................. 163
Restoration from stack ............................ 164
RISC-type instruction set .......................... 36
Round to nearest ....................................... 84
Rounding................................................... 84
Round-robin mode .................................. 327
S
Saving to bank ........................................ 162
Saving to stack ........................................ 164
SCIF interrupt sources ............................ 983
SCIF Module Timing............................ 1218
SD host interface (SDHI)........................ 831
SDHI Module Timing ........................... 1227
SDRAM interface ................................... 232
Searching cache ........................................ 96
Self-refreshing ........................................ 264
Sending a break signal ............................ 985
Sequence to write to ACSWR................. 214
Serial bit clock control ............................ 621
Serial communication interface with
FIFO (SCIF)............................................ 923
Serial Sound Interface (SSI) ................... 585
Shift instructions ....................................... 63
Sign extension of word data...................... 36
Single address mode ............................... 333
Single read .............................................. 251
Single write ............................................. 254
Slave receive operation ........................... 859
Rev. 1.00 Nov. 14, 2007 Page 1261 of 1262
REJ09B0437-0100