SH7670 Datasheet, PDF (605/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 15 Stream Interface (STIF)
15.6.1 Operation of PCR Clock Recovery
Internal PCR
(32 bits)
PCR base
(9 bits)
PCR ext
Internal STC
LKZF
UNZF
STC value -
PCR value
Internal PCR and STC values are binary-converted,
and then the difference between them is calculated.
Upper-side
comparison target
LKCYC+1
Upper-side
comparison target
PWMCYC+1
PWMSFT
PWMR
PWMCYC+1
(16 bits)
(16 bits)
PWMSEL
Selector 1
PWMCYC+1
Right shift
GAIN
Sign bit n is refilled by right-shift.
(n: Acceptable comparison bit
count specified by PWMCYC)
PWMCYC+1
PWMBR
PWMSEL2
Internal PWM
Selector 2
PWMCYC+1
(16 bits)
(16 bits)
PWMOUT output
waveform
Cycle: PWMCYC × PWMDIV
PWMOUT high
PWMOUT low
PWMOUT high = (Inverse value of PWM control variable (except MSB) + 1) × PWMDIV
PWMOUT low = (PWMCYC - PWMOUT high) × PWMDIV
Figure 15.9 Illustration of Register Settings
Rev. 1.00 Nov. 14, 2007 Page 579 of 1262
REJ09B0437-0100