SH7670 Datasheet, PDF (744/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 17 USB 2.0 Host/Function Module (USB)
Bit
Bit Name
13 to 11 
10
BFRE
Initial
Value R/W
All 0 R
0
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
BRDY Interrupt Operation Specification
Specifies the BRDY interrupt generation timing from
this module to the CPU with respect to the selected
pipe.
0: BRDY interrupt upon transmitting or receiving of
data
1: BRDY interrupt upon completion of reading of
data
When software has set this bit to 1 and the selected
pipe is in the receiving direction, this module detects
the transfer completion and generates the BRDY
interrupt on having read the pertinent packet.
When the BRDY interrupt is generated with the
above conditions, software needs to write 1 to BCLR.
The FIFO buffer assigned to the selected pipe is not
enabled for reception until 1 is written to BCLR.
When software has set this bit to 1 and the selected
pipe is in the transmitting direction, this module does
not generate the BRDY interrupt.
For details, refer to (1) BRDY Interrupt under section
17.4.2, Interrupt Functions.
Modify these bits while CSSTS is 0 and PID is NAK
and before the pipe is selected by the CURPIPE bits.
To modify these bits after completing USB
communication using the selected pipe, write 1 and
then 0 to ACLRM continuously through software to
clear the FIFO buffer assigned to the selected pipe
while the CSSTS, PID, and CURPIPE bits are in the
above-described state.
Before modifying these bits after modifying the PID
bits for the selected pipe from BUF to NAK, check
that CSSTS and PBUSY are 0. However, if the PID
bits have been modified to NAK by this module,
checking PBUSY through software is not necessary.
Rev. 1.00 Nov. 14, 2007 Page 718 of 1262
REJ09B0437-0100