 English |
|
|
|
|
|
|
|
| SH7670 Datasheet, PDF (283/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series | |||
| |||
| ◁ |
Section 7 Bus State Controller (BSC)
CKIO
A25 to A0
A12/A11*1
CSn
RAS
CAS
RD/WR
DQMxx
D31 to D0
BS
DACKn*2
Td1
Td2
Td3
Tnop Tc1
Tc2
Tc3
Tc4
Td4
Tde
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 7.20 Burst Read Timing (Bank Active, Same Row Addresses in the Same Bank,
CAS Latency 1)
Rev. 1.00 Nov. 14, 2007 Page 257 of 1262
REJ09B0437-0100
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese