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SH7670 Datasheet, PDF (1226/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
Section 29 Electrical Characteristics
CKIO
A25 to A0
A12/A11*1
CSn
RD/WR
RAS
CAS
DQMxx
D31 to D0
BS
CKE
DACKn
TENDn*2
Tr
Tc1
Tc2
Tc3
Tc4
Trwl
tAD1
tAD1
Row
address
tAD1
tAD1
tAD1
tAD1
Column
address
WRIT command
tCSD1
tRWD1
tRWD1
tRASD1
tRASD1
tCASD1
tDQMD1
tAD1
tAD1
tAD1
tAD1
WRITA
command
tCSD1
tRWD1
tCASD1
tDQMD1
tWDD2
tWDH2
tBSD
tWDD2
tWDH2
tBSD
tDACD
(High)
tDACD
Notes: 1. Address pin to be connected to A10 of SDRAM
2. The waveforms for DACKn and TENDn are produced when the active low state is specified.
Figure 29.22 Synchronous DRAM Burst-Write Bus Cycle
(Equivalent to Four Write Cycles)
(Auto-Precharged, WTRCD = Zero Cycle, TRWL = One Cycle)
Rev. 1.00 Nov. 14, 2007 Page 1200 of 1262
REJ09B0437-0100